UART (universal asynchronous receiver and transmitter) is always an 8bit or one byte. so in reality there is no use of one byte data ,it should be stream of data. The proposed scheme contains AMBA –AHB (advanced microcontroller bus architecture-advanced high-performance bus) bus protocol it contains on chip communications standard for designing high-performance system.

Now a day’s system on chip (SoC) architecture is very famous because with the help of SoC architecture any peripherals can be integrated together very easily, UART contains of three main components namely transmitter, receiver and baud rate generator which are nothing but the frequency divider. UART design will help to reduce area; hence more complex design could be added on the same chip. This type of design architecture will give a great advantage of reusability of modules.

In this project UART is used as an interface between computer and the chip means FPGA 9 field programmable gate array 0, using AMBA-AHB protocol, VGA 9 video graphics array driver is connected to display image in the LCD via UART and verified by simulating the design using modelsim PE student edition 10.2a, also synthesized on FPGA kits such as spartan3E using Xilinx ISE Design suit 14.3. Output is observed and cross verified for different trails.